Multi-port Eos Mapper (RC6400)

Overview

RC6400 is a highly integrated EOS device that provides for mapping of 4 Ethernet ports into SDH transport payloads. Complying with ITU-T standards, RC6400 adopts GFP-F encapsulation, low-order virtual concatenation (VCAT) and link capacity adjust scheme (LCAS). The device can communicate with products from other manufactures adopting the same standards.

Fratures

• Supports 4 RMII/ 4 SMII/ 1 MII Ethernet ports
•  Encapsulated Ethernet data maps to 63 VC-12s
•  GFP-F/ VCAT/ LCAS processing complies with ITU-T standards
•  Ethernet Interface
•  4 RMII/ 4 SMII/ 1 MII Ethernet ports
•  10M/100M, Full-Duplex
•  Configurable PAUSE flow control
•  Maximum frame size of 2036 bytes
•  Line side Ethernet data loop-back alarm indication
•  Local side loop-back control, for board diagnosis
•  Encapsulation/Decapsulation
•  GFP-F encapsulation, ITU-T G.7041
•  Auto-adaptive PTI/PFI/EXI for decapsulation
•  GFP Management Frame with 64-byte payload
•  Supports CSF frames, with user-defined UPI
• Virtual Concatenation
• Low-order Virtual Concatenation and Link Capacity Adjustment Scheme (compliant with ITU-T G.7042)
•  4 VCG groups, up to 63 VC-12s per group
•  Hitless dynamic bandwidth adjustment (by MP)
•  Automatic removal and recovery of VC-12s in the case of urgent alarms
•  112ms of differential delay tolerable
•  Low-order SDH Processing
•  Dual 38.88MHz telecom-bus, 4-bit mode
•  126 TU-12 pointer & VC-12 overhead processing
•  Supports TU-12/VC-12 1+1 protection switching
•  Provides N2/J2 overhead
•  All 63 VC-12s can be looped back to local side
•  A certain VC-12 can be looped back to lineside
•  SDRAM Interface
•  External 4M×16bit (64Mb) SDRAM
•  100MHz working clock, provided by RC6400
•  512K bytes of data buffer for each Ethernet port
•  Built-in SDRAM tester, for board diagnosis
•  Management statistics and alarm reports
•  Non-multiplexed Intel processor interface
•  LQFP 176 lead-free package
•  3.3V/1.8V power supply
•  Less than 1W of power consumption

Functional Block Diagram

Figure 1 Functional Block Diagram

典型应用

Figure 2 Application